In a move that extends the reach of its reprogrammable, flash-based ProASICPLUS field-programmable gate array (FPGA) family, Actel has introduced the 75 000-gate APA075. This expands the family to seven devices ranging in density from 75 000 to one million system gates.
The company also unveiled its FlashLock on-chip security feature, which adds another level of design security to the company's flash-based FPGA devices. In addition, Actel says that 20% performance improvements are possible with Actel Designer software and Actel Libero integrated design environment. These improvements target a wider range of application-specific integrated circuit (ASIC) alternative applications.
Design security advantage
Nonvolatile flash FPGAs offer levels of design security beyond conventional SRAM-based FPGAs and ASIC solutions. The ProASICPLUS FPGAs are user programmed with a key, ranging from 79 to 263 bits, that blocks external attempts to read or alter the configuration settings. Actel's on-chip security mechanism, called FlashLock, enables designers to lock the design after programming to prevent unauthorised changes. The FlashLock feature can also be used to thwart common security problems faced by designers using conventional SRAM devices, including overbuilding, cloning, reverse-engineering and denial of service.
Actel's flash-based ProASICPLUS FPGA family offers system speeds of up to 100 MHz and allows designers to seamlessly interface between 3,3 and 2,5 V devices in a mixed-voltage environment. The family contains two advanced clock-conditioning blocks, each consisting of a PLL core, delay lines and clock multiplier/dividers. In-system programmability (ISP) is supported through the IEEE standard 1149.1 JTAG interface.
The APA075 device includes multiple PLLs and support for up to 27 Kb of two-port embedded SRAM and 158 user-configurable I/Os.
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