Actel has announced that the Cadence NC family of simulators and BuildGates synthesis tool now fully supports Actel's ProASICPLUS family of flash-based FPGAs. For simulation of ProASICPLUS designs, the NC family of simulators (NC-Sim, NC- Verilog, NC-VHDL and the Verilog Desktop, VHDL Desktop and NC-Sim DeskTop simulators) provides high-performance application-specific integrated circuit (ASIC) simulation tools to verify mixed-language designs, enhance productivity and allow designers to quickly complete the verification cycle, according to the company. For ProASICPLUS users with an ASIC design flow, the Cadence BuildGates product offers high-performance, high-capacity synthesis. BuildGates also features a fast, integrated timing engine that reduces timing analysis iterations, thereby enabling more rapid timing closure, says Actel.
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