20 May 2015Telecoms, Datacoms, Wireless, IoT
Computer/Embedded Technology
Model 71624 is a member of Pentek’s Cobalt family of high-performance XMC modules based on the Xilinx Virtex-6 FPGA. As an intermediate frequency (IF) relay, it accepts two IF analog input channels, modifies up to 34 signals, and then delivers them to two analog IF outputs.
Any signal within each IF band can be independently enabled or disabled, and changed in both frequency and amplitude as it passes through the module.
The board supports many useful functions for both commercial and military communications systems, including signal drop/add/replace, frequency shifting and hopping, amplitude equalisation and bandwidth consolidation. Applications include countermeasures, active tracking and monitoring, channel security, interception, adaptive spectral management, jamming and encryption.
All of the board’s data converters, interfaces and control lines are connected to the Virtex-6 FPGA, which performs the data routing and DSP functions for the adaptive relay.
Model 71624 digitises two analog IF inputs using two 200 MHz, 16-bit analog-to-digital converters (ADC). The bandwidth of each IF signal can be up to 80 MHz, and may contain multiple signals, each centred at a different frequency. An array of 34 digital down-converters (DDC) can be independently programmed to translate any signal to baseband and then band-limit the signal as required. DDC tuning frequency is programmable from 0 Hz to the ADC sample rate. Output bandwidth is programmable from around 20 kHz to 312 kHz for a sample rate of 200 MHz. Each DDC can independently source IF data from either of the two ADCs.
Baseband I+Q DDC outputs are scaled in a programmable gain/attenuation block before being delivered across the PCIe system interface to target memory, typically associated with a system processor. Here, the signals can be analysed, classified, demodulated, decrypted or decoded, depending on the application.
Samples from each ADC can also be delivered across PCIe to system memory so that the processor can access wideband IF data. By performing an FFT, the processor can identify signals and then tune the DDCs accordingly.
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