Programmable Logic


XJTAG slashes Flash programming times

6 August 2014 Programmable Logic

XJTAG has integrated a new feature into its boundary scan solution that it claims speeds up Flash programming time up to 50-fold. Called XJFlash, it allows engineers to automatically generate customised programming solutions that can overcome the speed limitations generally associated with using boundary scan to program Flash memories connected to FPGAs.

By creating custom programming designs for each Flash/FPGA combination, this system relieves the JTAG chain of unnecessary traffic commonly generated by repetitive functions such as shifting in control, address and data bits. By doing so, programming speeds close to the device’s theoretical maximum can be achieved.

Previously only available as a consultancy service, the XJFlash module supports a wide range of Flash and FGPA configurations, and can now be used as part of an XJDeveloper boundary scan test project by the end user to create a programming solution. The integration comes alongside XJTAG’s recent release of version 3.2 of its test development system.

The innovative approach of the XJFlash module allows it to erase, program and verify any Flash memory, provided there is access to it from an FPGA on the target board, all within the XJTAG software.



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