Programmable Logic


New IP cores optimised for Actel FPGAs in military, aerospace and communications applications

28 June 2006 Programmable Logic

Actel offers two new intellectual property (IP) cores optimised for use with its radiation-tolerant and firm-error immune field-programmable gate arrays (FPGAs). In support of the emerging SAE AS5682 standard, the new Core1553BRT-EBR is a complete, dual-redundant enhanced bit rate (EBR) remote terminal core that offers the reliability and data rates required for high-bandwidth applications such as radar and laser targeting. Further, Actel is offering its CoreCORDIC register-transfer level (RTL) core free of charge to enable designers to build highly configurable digital signal processing systems such as digital receivers and cable modems.

"Actel has long been committed to providing solutions that meet the stringent demands of high-reliability and system-critical military, aerospace and communications applications as evidenced by the new Core1553BRT-EBR and CoreCORDIC solutions," said Ian Land, senior manager, IP solutions marketing, at Actel. "When combined with our nonvolatile, flash-based ProASIC3 or radiation-tolerant RTAX-S FPGAs, these new IP solutions enable designers to decrease time to market and to reduce both the non-recurring engineering costs and high system costs associated with application-specific integrated circuits."

* Core1553BRT-EBR: The Core1553BRT-EBR's time-multiplexed serial data bus supports a 10 Mbps data rate. The core can be configured to interface with on-chip or external memory as well as low-cost RS485 transceivers. This new core also features fail-safe state machines that protect the state machine from entering an illegal state in a high-radiation environment such as in an aircraft or a satellite.

* CoreCORDIC: This is a simple and efficient algorithm to calculate hyperbolic and trigonometric functions. It also performs coordinate transformations between rectangular and polar coordinates. Unlike competitive offerings, CoreCORDIC offers three architectural options - a small, bit-serial architecture; a word-serial architecture for moderate performance and size; and a parallel-pipelined architecture for high-performance applications. Available free of charge to Actel FPGA customers, the CoreCORDIC generator creates a user-defined test bench and RTL model, which is easily integrated into larger designs.



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