In-circuit emulators (ICEs) are essential tools in most software development cycles. They replace the microprocessor in the target system, giving the programmer full control over the target. The programmer can see exactly what the program is doing and why, making it easy to locate and correct errors and to fast-track the software development cycle.
The MetaICE and iceMASTER series of emulators, represents years of focused engineering by Metalink in creating affordable, fully-featured realtime emulators that meet or exceed user requirements. The MetaICE-XF advances the state-of-the-art in 8051 emulator design with a combination of small footprint, high speed and attractive features.
The MetaICE-XF supports the following features as standard: high level and assembly level debugging; powerful user interface; speeds up to 66 MHz; support for most 8051 devices; 256 KB code memory/256 KB external data memory; 256 K hardware breakpoints; 64 K frames of trace memory with time stamp; SFR Write Data in trace memory; monitored SFRs (SP, IE, DPTR) in trace memory; bank switching; realtime nonintrusive operation.
The SFR Write Data and Monitored SFRs (special function register) trace features are unique to these emulators. The realtime nature distinguishes the MetaICE-XF from other emulators. These features are provided without stopping the processor, whereas other emulators may do this by using a succession of steps, stopping emulation at each step. The SFR Write Data trace feature means that each direct data write to an SFR is captured in the trace memory. The Monitored SFR trace feature means that the value of SP, IE and DPTR is captured in the trace memory. These features allow a designer to track the status of these critical registers.
The MetaICE-XF supports the Atmel and Philips 8x51 RD2, RC2, RB2 and RA2, the Philips RD+, RC+, RB+ and RA+, the FC, FB and FA, and other devices such as the standard 8031, 8032, 8051 and 8052.
User interface
iceMASTER emulators provide a Windows user interface with online manual and context-sensitive hyperlinked help. Active windows include: CPU registers and PSW bits; bit memory; stack data; multiple code, internal and external data memory; Assembly-level, high level language or mixed debugging; watch window for variables, with full access to structures and variables on stack.
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Email: | info3@logica.co.za |
www: | www.logica.co.za |
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