XJTAG used the occasion of Embedded World 2016 in Nuremberg, Germany to launch the XJTAG DFT Assistant for Altium Designer. The free software extension significantly increases the DFT (Design for Test) capabilities of the unified schematic capture and PCB design system.
Modern printed circuit boards (PCBs) are increasingly densely populated and access to pins under many packages, such as ball grid array (BGA) or land grid array (LGA), is virtually impossible. This is a major challenge for any test equipment that relies on physical contact to a node or pin. As boundary scan was designed to be the practical solution to this challenge, it has become vitally important to get the boundary scan chain right at the design stage. XJTAG DFT Assistant for Altium Designer helps validate correct boundary scan chain connectivity, through full integration with Altium Designer.
“The XJTAG DFT Assistant for Altium Designer provides engineers with a free, easy to use extension to check if boundary scan chains are correctly connected and terminated at the schematic capture stage, long before the PCB is produced. By detecting and correcting these faults earlier, companies do save both time and money,” commented Simon Payne, CEO of XJTAG. “While the first prototype is being manufactured, XJTAG DFT Assistant allows you to export a preliminary XJTAG project from Altium Designer to the XJTAG development software, where additional tests can be developed. These can then be used to test real hardware as soon as it’s available. This provides a vital new capability to electronic engineers everywhere.”
The DFT Assistant comprises two key elements: the XJTAG Chain Checker and the XJTAG Access Viewer.
XJTAG Chain Checker identifies common errors in a JTAG scan chain, such as incorrectly connected Test Access Ports (TAPs). A single connection error would inhibit an entire scan chain from working; XJTAG Chain Checker identifies connection errors and reports them to the developer during the design process. Incorrectly terminated TAPs are also identified.
XJTAG Access Viewer overlays the extent of boundary scan access onto the schematic diagram, allowing users to instantly see which components are accessible using boundary scan, and where test coverage could be further extended.
XJTAG DFT Assistant for Altium Designer is a free extension downloadable from the Extensions panel.
MPLAB PICkit Basic ASIC Design Services
Design Automation
To make its robust programming and debugging capabilities accessible to a wider range of engineers, Microchip Technology has launched the MPLAB PICkit Basic in-circuit debugger.
Read more...Case Study: Siemens Valor automation solution ASIC Design Services
Editor's Choice Manufacturing / Production Technology, Hardware & Services
Electronics manufacturer BMK used Siemens Valor to enhance accuracy and speed up bill-of-materials quotations.
Read more...Accelerating RF PCB design in a 5G world ASIC Design Services
Editor's Choice Design Automation
Billions of IoT devices coming online in the coming years will require RF design capabilities that support ultra-fast 5G speeds.
Read more...XJLink-PF40 JTAG controller ASIC Design Services
Test & Measurement
XJTAG, a specialist in electronic testing, has released its new XJLink-PF40 JTAG controller together with version 4 of its popular PCB software testing suite.
Read more...NECTO Studio has been updated
Design Automation
NECTO Studio V7.1 IDE from MIKROE now includes full programmer and debug support for Microchip tools and also adds support for Microchip’s SAM MCU and STMicroelectronics’ STM32L4 series of ultra-low-power MCUs.
Read more...Microchip SoC FPGA ASIC Design Services
DSP, Micros & Memory
Microchip Technology introduced the RT PolarFire SoC FPGA, the first real-time Linux capable, RISC-V-based microprocessor subsystem on a proven RT PolarFire FPGA platform.
Read more...Development kit for MIL-STD-1553 dual transceiver ASIC Design Services
Telecoms, Datacoms, Wireless, IoT
Holt Integrated Circuits has announced the introduction of ADK-1592, a development kit designed to help customers interface Holt’s recently announced HI-1592 radiation hardened transceiver.
Read more...Development kit for programmable 16-channel low-side driver ASIC Design Services
DSP, Micros & Memory
Holt Integrated Circuits has announced the introduction of ADK-84216, a development kit designed to demonstrate the features of Holt’s recently announced programmable 16-channel low-side driver, HI-84216.
Read more...Microchip’s RTG4 FPGAs achieve highest space qualification ASIC Design Services
DSP, Micros & Memory
QML Class V is the highest level of qualification for space components, and a necessary step to satisfy mission-assurance requirements on the most critical space missions such as human-rated, deep space, and national security programmes.
Read more...Altium provides free training
Design Automation
There is no longer any excuse not to master Altium Designer with the company now offering both advanced instructor-led three-day training and an on-demand video series.
printer friendly version