One of the anticipated limitations in the field of electronics that is likely to be faced at some point in the future is that it might become impossible to juxtapose more chips on a circuit board. This in turn might limit the capabilities of future processors.
Significant strides are being made by investigators from around the globe to unveil solutions to address the associated challenges of this problem. Amongst the suggested solutions is the expansion of circuitry in the vertical direction rather that the conventional horizontal orientation – that is, to shift from two-dimensional (2D) circuit configuration to three-dimensional (3D) chip configuration.
An archetypal circuit, which has marked the realisation of this technology transformation, is being developed at the University of Rochester (UofR) in New York. Engineers from the university’s department of electrical and computer engineering have developed what they claim is the first-ever 3D synchronisation circuitry, which operates at 1,4 gigahertz frequency.
The scientists at UofR refer to this circuitry as the cube. They are also expecting this novel technology to extensively enhance the capabilities of processors beyond what was possible to achieve with a conventional 2D microchip.
The approach adopted for the fabrication of the 3D chip is a unique procedure, which involves drilling millions of holes through layers of insulating material, which are employed for providing electrical isolation between the multiple layers of circuitry. Through this technique, myriads of vertical electrical connectivity are enabled between the transistors across different layers.
The factor that clearly distinguishes UofR’s work from prior attempts to create 3D processors is that the new chip does not involve stacking a number of regular processors on top of one another. The circuit was optimally designed to enable the execution of all key processing functions through multiple layers of the processor in a manner that is similar to that of a regular chip design, which functions on a 2D platform.
Possibly the most innovative aspect of the suggested design is that it has pioneered facilitating the synchronicity, power distribution and long-distance signalling for a 3D processor design. According to the researchers, the design favours the miniaturisation trend in electronics, as 3D chips essentially incorporate the entire circuit board, which normally spreads across a comparatively larger surface area. Due to the shorter distances that are to be covered by the electrical signals, the operational speeds are expected to increase by at least 10 times.
The vertical design has not yet been optimised and there are numerous impediments faced by the design at present. According to the creators of the chip, the task of getting the multiple layers to function in harmony is quite challenging. This is because an entire circuit board is shrunk and incorporated onto a single cube and multiple layers with different functional speed and frequency with varying power requirements will have to be interfaced. Designing a single control system to work in any chip is another assignment that poses a significant challenge.
For more information contact Patrick Cairns, Frost & Sullivan, +27 (0)21 680 3274, [email protected], www.frost.com
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