Hittite has expanded its clocks and timing product portfolio to include the HMC1031MS8E, a low-power integer-N PLL clock generator. This new device is ideal as a building block for jitter attenuation, OCXO and TCXO frequency multiplication and low-power VCXO-based clock generators driving data converters (ADCs/DACs), FPGAs and SERDES applications.
The chip includes a phase/frequency detector with a charge pump current output and a low-power integer-N divider resulting in reference frequency multiplication ratios of x1, x5 and x10. Together with an external loop filter and a VCXO, VC-TCXO or OCXO, the HMC1031MS8E forms a complete clock generator solution targeted for jitter clean-up and reference clock multiplication/generation applications.
The IC may be used with a low phase noise VCXO to multiply 10 MHz TCXO or OCXO sources to 50 MHz or 100 MHz with excellent long-term stability. Such a topology reduces system cost and improves control over the design because high-frequency OCXOs and TCXOs may be more expensive, have higher ageing rates and degraded phase noise compared to their low-frequency 10 MHz counterparts.
Additional applications of the HMC1031MS8E may include low-frequency clock jitter attenuation and clock frequency translation or synchronisation for 25 MHz and 125 MHz Ethernet clocks and 27,000 MHz, 74,250 MHz and 74,1758 MHz video clocks.
The integrated phase detector and charge pump are capable of operating up to 140 MHz which means the designer can eliminate noise-generating divider circuitry, further reducing cost; additionally, VCXOs as high as 500 MHz can be used.
The low-power architecture of the device consumes less than 2 mA under typical conditions, making the device well suited for power-sensitive battery powered and portable applications. Additional features include integrated lock detect indicator on a dedicated hardware pin, and a built-in power-down mode for further power saving.
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