DSP, Micros & Memory


Webinar: Understanding Versal – Scalar engines

28 February 2023 DSP, Micros & Memory

This webinar focuses on the Versal Processing System (PS), including the Arm APU, Arm RPU, and AMD Xilinx microcontrollers.

The scalar engines include processing units based on sequential processing, while other Versal engines support parallel processing. The Cortex-A72 APU architecture, the Cortex-R5F architecture, the Xilinx Platform manager (PMC), and the processing system manager will be described in this session.

Dedicated peripheral and memory I/O pins can be configured with the processing system. The power domains in the processing system provide a topology to fulfil safety requirements. For asynchronous processing and inter-processor communication, interrupt management is needed. Therefore, the system interrupts controllers will also be described in this webinar.

Date: 16 March 2023

Time: 16:00 CAT

For more information visit https://www.plc2.com/en/training/detail/understanding-versal-scalar-engines-the-processing-system-webinar




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