Low power 3 V/18 mV, 40 MHz I/QDACs deliver 70 db SFDR

1 March 2000 Analogue, Mixed Signal, LSI

he MAX5180 family of monolithic CMOS digital-to-analog converters is capable of 40 MHz update rates while operating from +2,7 to +3,3 V according to manufacturer, Maxim. Twelve devices are available including 8-bit and 10-bit, dual and single and voltage-output and current-output versions complete with an on-chip 50 ppm/°C, low- noise reference. They are targeted at imaging, high-speed communication and signal-synthesis applications where high dynamic performance and lowest power are required.

These devices deliver ±0,5 LSB INL and DNL and are guaranteed monotonic. The dual versions offer four times lower power at 3 V than the nearest competing part while providing ±1 FSR gain and 0,15° phase matching in I/Q reconstruction (transmit) applications. Two selectable idle modes reduce power to as low as 1 µA (max) when the application is inactive.

The dual 10-bit MAX5180 (current output) and MAX5183 (voltage output) DACs supply 70 dBc SFDR at fOUT of 2,2 MHz while consuming only 18 mW from a +3 V supply. They are intended for use in I/Q baseband signal-reconstruction circuits used in portable digital communications systems. Targeted at lower resolution applications in portable digital communication systems, the dual 8-bit MAX5186 (current output) and MAX5189 (voltage output) supply 58 dBC SFDR (at 2,2 MHz fOUT) and consume only 16 mW at +3 V.

Both the dual 8-bit and 10-bit versions accept interleaved data on a single digital input bus from upstream logic and provide analog output in current or voltage format. Both I and Q DAC outputs update simultaneously on each clock cycle.

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