Analogue, Mixed Signal, LSI


Clock synthesiser with low phase noise

4 September 2013 Analogue, Mixed Signal, LSI

New from Semtech is the ACS1790T, a low phase noise clock synthesiser offering frequency selection better than one part per billion with typical RMS jitter below 500 femtoseconds.

The new part is suitable for a wide range of demanding applications including 10G Ethernet, Synchronous Ethernet, SONET/SDH, Fibre Channel, CDR, software controlled clock generation and other reference clocks. It can be used either as a standalone frequency synthesiser or as a companion chip to the ACS9522T ToPSync system synchronisation solution, generating a low phase noise local reference clock that is aligned to the system timing recovered by the ACS9522T.

As a standalone frequency synthesiser, the ACS1790T offers flexibility with a 24-bit fractional feedback divider that generates any output frequency with a resolution of 0,5 parts per billion. This allows synthesis of any output frequency within the range of 10 to 200 MHz on the LVPECL output and 2 kHz to 125 MHz on the LVCMOS output.

The part is packaged in a 4 x 4 mm 24-QFN package. All loop components are on-chip, simplifying the circuit board layout and making the total solution footprint ideal for space-constrained applications. The combination of a high fractional resolution with a simple serial interface also makes the device ideal for use in software-controlled loops where a translated but disciplined or traceable clock is required.

For more information contact Marian Ledgerwood, Future Electronics, +27 (0)21 421 8292, [email protected], www.futureelectronics.com.



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