Programmable ASSP provides enhanced flexibility for high-speed designs
4 July 2001
Programmable Logic
Altera offers a new level of system integration with its Mercury device family. Said to be the world's first programmable ASSP, Mercury devices combine the high-speed I/O capabilities of an advanced clock data recovery (CDR)-enabled transceiver with a performance-optimised core that is built for bandwidth. This high performance I/O support enables systems in backplane, chip- to-chip, and line-side applications via support for a variety of I/O protocols including Gigabit Ethernet and SONET/SDH.
Figure 1. The need for CDR at speeds of 1 Gbps and beyond illustrated: CDR removes clock skew concerns by encoding the clock into every data stream, guaranteeing that the clock and data are always perfectly in phase. This eliminates tight routing signal requirements, removing the need for a specified layout relationship between the clock and data lines
The CDR transceivers within the Mercury devices eliminate frequency barriers faced by source-synchronous systems by offering data rates of up to 1,25 Gbps and a total CDR bandwidth of up to 45 Gbps. This advanced CDR capability, combined with a high performance core and distributed multiplier capability, offers system designers an effective solution for key communications applications.
These standards are implemented with the flexibility of programmable logic. Mercury CDR supports up to 18 channels per device, each capable of up to 1,25 Gbps operation. The Mercury device family also supports a variety of high-speed I/O standards, external memory interfacing, enhanced phase-locked loops (PLLs), and quad-port capable embedded system block (ESB) RAM, giving customers the possibilities of ASSPs in a programmable logic device.
The Mercury devices offer support for a wide variety of common protocols, including SONET, Gigabit Ethernet, RapidIO, POS-PHY Level 4, IEEE-1394 and Fibre Channel. This support is enabled with the LVDS, LVPECL and PCML physical standards.
The Altera Mercury family consists of two 1,25 Gbps devices: EP1M120 with 8 CDR channels containing 120 000 gates of programmable logic and EP1M350 with 18 CDR channels, containing 350 000 gates of programmable logic.
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