Clock synthesisers replace multiple clock sources

2 September 2009 Electronics Technology

IDT’s latest member of its FemtoClocks range – the FemtoClock Next Generation (NG) family – features very low phase-noise performance and improved power-supply noise rejection, allowing for increased bandwidth when used with serial interfaces. The new clock synthesisers are fully customisable, standalone solutions that generate reference frequencies allowing them to replace crystal and SAW oscillators in high-performance applications. Additionally, the new FemtoClocks provide greater design flexibility in networking and telecommunications applications that utilise 10 Gbit Ethernet, PCI Express, Fibre Channel and SONET interfaces by enabling multiple oscillators to be replaced with a single FemtoClock.

As with previous generation FemtoClocks, the new IDT timing solutions are designed to work in conjunction with other devices on the board that require a reference clock, such as PHYs, switches, ASICs and network processors. The result of this cohesive nature between devices is a simplified board design and layout.

The first device in this family, the 843N156-125, generates a 125 MHz single-ended output and a 156,25 MHz LVPECL output from a single 25 MHz crystal, replacing two crystal oscillators on the board with one device, providing application architects with increased design flexibility. The typical root-mean-square (RMS) phase noise jitter for both frequencies is 400 fs, making these suitable for PCIe, Gigabit Ethernet and 10 Gbit Ethernet applications, since it gives designers ample margin in their designs to meet the jitter requirements of these standards.

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