Opto-Electronics


Display controller meets DSI standard

22 July 2009 Opto-Electronics

California Micro Devices has developed the CM5210 MIPI client display controller to meet the requirements of the MIPI DSI (display serial interface) standard.

With the introduction of the DSI standard, host processors can refresh video images onto display modules through high-speed serial interfaces. Video timing information such as horizontal and vertical synchronisation pulses, front and back porch periods, and pixel data are formatted in DSI packets and transmitted over the MIPI interface. Client displays reconstruct all timing information based on received packets and deliver image data on the display. This Type-4 display architecture eliminates the need for a dedicated graphics frame buffer built into the LCD modules, hence reducing overall system cost. The serial interface is based on the SLVS (scalable low voltage signalling) standard, thereby achieving very low power consumption.

The CM5210 is compliant with the latest D-PHY (V0.90) and DSI (V1.01 R.11) specifications, capable of receiving DSI packets in HS (high-speed) mode on either one or two data lanes. While operating in video mode with a continuous clock, the high-speed DSI clock is being used to drive the logic recovering timing information for the LCDs, and the system can achieve very low power consumption since only minimal logic gates are active. On the other hand, when operating in non-continuous clock mode, an internal PLL is used to generate clocks to decode incoming packets stored in the line buffer, and also to generate a pixel clock to refresh the LCD modules in a constant manner.

The device features two display output interfaces: DPI (or RGB) and DBI Type-C (or SPI). The primary RGB interface is compliant with MIPI DPI (display pixel interface) specifications, capable of outputting 24-,18- and 16-bit pixel formats. The interface also supports serial RGB (8-bit) pixel format. The secondary DBI-C or SPI interface is typically used to drive low-resolution smart panels, or simply to configure register settings on the primary display. Both display output interfaces are addressed through the DSI interface with different VCs (virtual channels), thus the host can control the entire display system with a single high-speed serial interface, eliminating the need for complicated inter-connects. A programmable PWM (pulse width modulation) output is available to control the brightness of the backlight LED.



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