Telecoms, Datacoms, Wireless, IoT


A dual-CPU strategy for M2M designs

19 March 2008 Telecoms, Datacoms, Wireless, IoT

The M2M market challenge

The M2M market demands more feature upgrades and increased computing power on a daily basis. The resulting constant increase in complexity and computing power is now becoming a challenge to the system developer who has to deal with much faster memory and microcontrollers. With CPU/RAM clocks in the range of hundreds of MHz, the signal integrity and EMC aspects become a relevant part of the design process. Also, to complicate the task further, the faster microcontroller systems have to coexist with M2M GSM/GPRS radio engines and, additionally in many designs, with an embedded antenna. The coexistence must occur without disturbing each other and without generating spurious emissions and harmonics.

What the M2M module offers

The solutions offered to the M2M developer addressing highly complex and resource demanding applications are all based on a CPU sharing model, where the GPRS engine CPU shares its remaining available resources. There are different software languages supported, ranging from Python to Java or a custom C set of APIs with a variety of different capabilities, but all have the same bottleneck. The only realtime application that runs on the CPU is the communication protocol stack. Furthermore, care must be taken in order to avoid the application code corrupting the normal GPRS operations.

While for low- to mid-complexity applications this can be accepted and provides sensible savings from a BOM point of view, for high complexity applications this limitation is becoming a barrier. The integration of hardware components and realtime software results are hard to do. The effort to test the results against various network conditions (due to the influence of GPRS stack operations on the application code execution) is huge and does not give an exhaustive response.

Telit's dual-CPU strategy

To address this demand, Telit has introduced a dual-CPU product family, in which the same M2M module coexists with two CPUs, the GPRS engine CPU and the M2M application CPU. Both are complete with their own distinct resources (RAM, Flash, supply) and can be operated independently from each other.

The first dual-CPU product in the lineup is the GE863-PRO3. The module includes, together with the well established standard Telit GSM/GPRS engine, a powerful 200 MIPS ARM9 application processor with dedicated power management, 8 MByte fast SDRAM memory and 4 MByte Flash.

Dual-CPU strategy: The advantages

By embedding the ARM9 processor, Flash and the fast 100 MHz SDRAM in the module, Telit has resolved the EMC and signal integrity issues of its clients that arise when integrating such fast devices with GSM/GPRS radios. Thanks to cooperation with Atmel, which made the application CPU core, all this technology is incorporated into the compact package of the GE863 family. The ARM9 core is completely standalone and does not have any resource sharing with the GSM/GPRS engine.

There are many advantages to such an architecture:

* The M2M software developer does not have any constraints in using the ARM9 resources. They are fully available for the application. No matter what the GPRS engine is doing, the application processor is always executing customer code at full speed.

* Application code debugging is easier and can be exhaustive because its execution does not depend on GPRS stack and network conditions.

* M2M developers can run any OS or code in the application processor. There are no fixed developer environments to be used, although Telit provides a 'ready to run' Linux platform with Python porting.

* M2M developers can take advantage of the Python platform with new features and better integration in its Linux native OS.

GE863-PRO3 ball-out optimised for routing

In the GE863-PRO3 there is no internal direct interconnection between the application processor and the embedded GPRS engine, leaving a great amount of freedom to the designer.

GE863-PRO3 BGA ball-out has been optimised in order to allow an easy routing between the application and the GPRS engine. For most of the standard interconnections, the two signal balls face directly, requiring very simple routing while sensible signals that need to be kept separate, such as the GSM antenna pad, are placed in a way to facilitate the separation.

Even the power inputs have been separated while keeping them compatible. The hardware designer can decide to merge them into a single source supply or to supply them separately with different power supplies, one for the application processor (low consumption) and one for the GSM/GPRS part (busted high consumption).

GE863-PRO3 - A full set of peripherals added

The set of peripherals inserted into the GE863-PRO3 application processor gives the developer a state-of-the-art module, with:

* Seven USARTs.

* Two SPI buses with up to 18 slaves.

* One image sensor interface ITU-B 601/656.

* One IIC bus.

* One ISO7816/SmartCard interface.

* One SD/MMC Multimedia Card interface.

* One Synchronous Serial Controller for digital audio I/O.

* One Ethernet MAC controller.

* Four ADC with ADC trigger input.

* Six PWM DAC.

* One USB device port.

* Two USB host OHCI compliant ports.

* Two clock outputs.

* One JTAG debug port.

* 90 GPIO.

And additionally from the GSM/GPRS engine:

* Two analog audio paths.

* SIM card interface.

* Digital audio interface.

* Nine GPIO for various enhanced features. such as alarm output or buzzer.





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