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Exploiting the benefits of the company's flash-based architecture, the ProASIC3 device also supports implementation of a soft ARM7 processor core and is an optimal solution for power-, cost- and size-conscious designs.
The ProASIC3 family lowers overall system costs by eliminating the need for various components on the system board. The single-chip device requires no external boot PROM or microcontroller to support device programming, and the Level-0 live at power-up feature of the ProASIC3 device eliminates the need for an external CPLD. Using fewer components reduces board space, which increases reliability, simplifies inventory management and lowers total system costs by as much as 70% compared to similar SRAM-based FPGA solutions, claims the company.
The ProASIC3 A3P1000 has a stand-by current consumption of only 8 mA under typical conditions - nearly an order of magnitude lower than industry standard. In addition, it contains 1024 bits (128 bits x 8 pages) of on-chip user nonvolatile flash memory and an on-board phase-locked loop (PLL). The device also provides secure in-system programming capability through on-chip 128-bit AES decryption and built-in flash key storage technology.
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