This article serves as both a synopsis and an introduction to Lucio Di Jasio’s book “This is (not) Rocket Science – How a new generation of Core Independent Peripherals redefined embedded control.” The 160-page book can be obtained through local Microchip Technology representative, Tempe Technologies, contact details for which are at the end of the article. In particular, the author targets the book at the following readers:
• If you think you know 8-bit microcontrollers, think again; these are not your grandfather’s microcontrollers anymore.
• If you knew and liked PIC microcontrollers, but have not looked at them in a while, you will get a kick out of this.
• If you think you knew PIC microcontrollers but hated their cryptic instruction set and many idiosyncrasies, you should take a second look now.
• If you have been trying to use small 32-bit microcontrollers, but got put off by the rapidly escalating complexity and the excessive reliance on software when trying to realise even the simplest real-time functions, you will get a refreshing new perspective.
Introduction
Ten years have passed since I started writing my first embedded C programming books, focusing first on 16-bit and eventually 32-bit architectures. At the time, like most others in this industry, I was predicting a slow but sure decline of the 8-bit applications. Instead, 8-bit PIC microcontrollers have continued to grow steadily with volumes that have surpassed the mark of 1 billion units shipped per year.
Much to my own surprise, and perhaps driven by the competitive pressure presented by the new generations of low end 32-bit microcontrollers, it is in the 8-bit PIC architecture that I have witnessed the most spectacular and exciting innovation happen. This started with the evolution of the PIC16F1 core, followed by the gradual introduction of the Core Independent Peripherals.
It is not about the core
Adoption of the C programming language has accelerated in the past decade to become the norm today in all embedded control applications. All the while, assembly programming has been relegated to a few specialised applications and, even there, often isolated to small sections within an application.
The development of the so-called ‘Enhanced Mid-Range’ core, or more simply what I call the PIC16 F1 core from the easily recognisable first digit used in all parts featuring it, was the natural response from Microchip’s 8-bit architecture team.
The original PIC core had been optimally designed for the most efficient use in hand coded assembly, but was notoriously challenging for compiler designers. The architects of the 8-bit PIC quickly squeezed in a few more instructions (12 in total) to help with the code density of typical C compiler constructs and, most cleverly, provided it with a new linear access mode to memory, removing the number one offender – RAM banking – from the compiler designer’s concerns. While at it, they also dropped in an automatic interrupt context-saving feature and, for good measure, doubled the hardware stack so as to make interrupt handling and general complex function nesting more agile.
The new core enhancements were introduced so smoothly that most ‘legacy’ users hardly noticed the core transplant. In fact the implementation allowed for total backward compatibility with decades of mostly assembly applications while, in new applications, the C compiler abstracts away all the underlying architectural detail and the user experience relates only to the improved speed, interrupt response capabilities, increased stack depth and code compactness.
Core Independent Peripherals
The true focus of all recent innovations, though, has been the peripheral set of the 8-bit PIC microcontrollers with the introduction of the Core Independent Peripherals or CIPs for short. This introduction represents a major shift in the way PIC microcontroller solutions are designed today and most importantly in how they differ from the approach of the low end 32-bit MCUs that are competing for the same applications space.
Where the latter are assuming an ever stronger focus on software (more of it, meaning more complexity and requiring higher clock speeds and more power), the Core Independent Peripheral approach is the exact opposite. It is by focusing on autonomous and directly interconnected hardware peripheral blocks that 8-bit applications can achieve more while reducing software complexity, delivering faster response times at lower clock speeds and using less power.
Three steps to embedded control Zen
As in oriental disciplines, achieving illumination is a gradual process of inner growth. Truly understanding the CIP philosophy requires at least three major steps:
1. Discovery, where the disciple is introduced for the first time as a new way of approaching the challenges of this (embedded) world. Large sections of this book are devoted to presenting brand new Core Independent Peripherals and/or enhancements to familiar ones. For each new CIP, I attempt to explain the target use cases and hint at possible further applications to achieve specific core workload reductions.
2. Mastery, gaining an understanding of the deeper philosophy behind the design of the new CIPs and comprehending how they can be interconnected, like LEGO blocks, to create new functions and to radically change the overall application design. Each chapter in the book is dedicated to a specific function that can be better expressed by combining one or more of the peripherals presented.
3. Zen, wherein the disciple takes an holistic approach, freely mixing analog and newly constructed digital functions to remove most or all hard timing constraints from an application, reducing code size and complexity by achieving automatic responses via chains of hardware events to create complete mixed-signal solutions.
Why the CIP paradigm is different
Considered individually, CIPs are not necessarily absolute novelties. Most of them are or have been available in other, often competing, architectures or as part of larger systems. What is different, though, is their focus on autonomous operation and direct interconnection.
Furthermore, some readers will be tempted to compare the assembly of CIPs to create new functions with programmable logic (FPGA) system design. But the difference in the approach is vast when one considers the granularity of the building blocks. The CIP philosophy consists in re-assembling really large functional units (complete peripherals) rather than individual gates.
Despite the apparent loss in flexibility, the CIP approach has three major advantages:
The skill set required is of the kind that is most available in the embedded control industry. Any engineer with even minimal exposure to firmware development, but also most computer science graduates, electrical engineers and even hobbyists, will be immediately familiar with the CIPs. This is definitely not the case when programmable logic is used for a complete SoC design to include (soft) core development, where the skill set required is highly specialised, including familiarity with hardware description languages, adding specific core architecture and interfacing deep knowledge, possibly augmented by complex proprietary model libraries.
The power consumption of a pure programmable logic application is orders of magnitude higher. Microcontrollers featuring CIPs are capable of eXtreme Low Power (XLP) operation.
The cost of a pure programmable logic application is also orders of magnitude higher. Microcontrollers featuring CIPs are offered at the lowest end of the price range.
Where to find the Core Independent Peripherals
In Microchip’s typically conservative approach, new Core Independent Peripherals have been added gradually to every new family of PIC16F1 microcontrollers introduced over the last five years or so. This was done for two major reasons: to reduce risk and to keep the new microcontrollers competitive.
In fact, just like in software development, when introducing a new peripheral, possibly replacing an older module, there is always the danger of introducing new bugs. A too-fast proliferation of a module, before it is fully debugged and understood, is a sure way to cause a lot of trouble. At the same time, adding too many features to a product without a clear application focus means only increasing the cost without a clear benefit to the end user.
Rocket science
The introduction of the Core Independent Peripherals poses a new set of challenges. The new paradigm requires the embedded control designer to make a small step outside his comfort zone. As the saying goes, “if you have a hammer in your hand every problem looks like a nail”. So if the triplet (timer, ADC, PWM) is where one’s comfort zone is, the natural approach to any new application is to throw more of the above at the problem and patch it all up with sufficient amounts of software, interrupts and, above all, MIPS.
Add to that the dominant, perhaps Moore Law induced, culture that wants more (software/performance) to equate with better and one can appreciate the magnitude of the effort required to change perspective. The challenge is therefore for designers to take a look at what new tools are available, and dare to go against the grain by looking for CIP solutions that require less software, less complexity and less power. This is not rocket science!
Software tools
Designers can use MPLAB X, a free and cross-platform (Windows, OS X and Linux) integrated development environment (IDE), as well as the free MPLAB XC8 compiler and MPLAB Code Configurator (MCC), a plug-in that allows generation of a safe and space-optimised API (a set of functions written in C) to initialise and control the microcontroller peripherals for the specific configuration required by an application.
Hardware tools
A Microchip Universal In-Circuit Debugger/Programmer PICkit 3, despite its low cost, allows developers to program and debug more than 1000 different PIC microcontroller models regardless of their core architecture (8, 16 or 32-bit). A PICDEM Lab Development Kit, bundling breadboard and PICkit 3 programmer/debugger, or perhaps most cost effectively, the recently introduced PICDEM Curiosity board featuring an integrated programmer/debugger and novel modular expansion options, should also be considered as powerful development tools.
About the author
Lucio Di Jasio obtained his MSEE (Summa cum Laude) from the University of Trieste in Italy in 1990. He has worked for Microchip Technology since 1995, in roles including field applications engineer; various product divisions at the company’s global headquarters in Arizona, USA; and his current position as European business development manager for the 8-bit MCU division.
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