Single-chip manages high-capacity data queueing

DSP, Micros & Memory

19 November 2003 DSP, Micros & Memory Information Security

IDT has introduced a new sequential flow-control (SFC) device family, the latest addition to the company's portfolio of flow-control management ICs. The devices provide high-performance data flow management by using a seamless connection to an external double-data-rate (DDR) SDRAM for storing and transferring up to 1 Gigabit of data in a sequential fashion. The SFC devices handle all DDR SDRAM interactions, and can support SDRAM densities of 128 Mbit or 256 Mbit for a single device, allowing up to four memory devices to be connected to each SFC device. Traditionally, high-density sequential queuing of data involved the use of cumbersome and time-consuming 'home-grown' semiconductor solutions including expensive ASICs or FPGAs. This device enables use of a smaller, lower cost FPGA, reducing the complexity and cost of the system implementation.

Avnet Kopp, 011 809 6100 or Memec SA, 011 897 8600

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Single-chip manages high-capacity data queueing

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